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a
Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps AD9631/AD9632
FUNCTIONAL BLOCK DIAGRAM 8-Pin Plastic Mini-DIP (N), Cerdip (Q), and SO (R) Packages
FEATURES Wide Bandwidth AD9631, G = +1 AD9632, G = +2 Small Signal 320 MHz 250 MHz Large Signal (4 V p-p) 175 MHz 180 MHz Ultralow Distortion (SFDR), Low Noise -113 dBc typ @ 1 MHz -95 dBc typ @ 5 MHz -72 dBc typ @ 20 MHz +46 dBm 3rd Order Intercept @ 25 MHz 7.0 nV/Hz Spectral Noise Density High Speed Slew Rate 1300 V/s Settling 16 ns to 0.01%, 2 V Step 3 V to 5 V Supply Operation 17 mA Supply Current APPLICATIONS ADC Input Driver Differential Amplifiers IF/RF Amplifiers Pulse Amplifiers Professional Video DAC Current to Voltage Baseband and Video Communications Pin Diode Receivers Active Filters/Integrators/Log Amps PRODUCT DESCRIPTION
HARMONIC DISTORTION - dBc
NC -INPUT +INPUT -V S
1 2 3 4
8 7 6
NC +VS OUTPUT NC
AD9631/32
(Top View) NC = NO CONNECT
5
These characteristics position the AD9631/AD9632 ideally for driving flash as well as high resolution ADCs. Additionally, the balanced high impedance inputs of the voltage feedback architecture allow maximum flexibility when designing active filters. The AD9631 is offered in industrial (-40C to +85C) and military (-55C to +125C) temperature ranges and the AD9632 in industrial. Industrial versions are available in plastic DIP and SOIC; MIL versions are packaged in cerdip.
-30 VO = 2V p-p VS = 5V RL = 500 -50
The AD9631 and AD9632 are very high speed and wide bandwidth amplifiers. They are an improved performance alternative to the AD9621 and AD9622. The AD9631 is unity gain stable. The AD9632 is stable at gains of two or greater. Utilizing a voltage feedback architecture, the AD9631/AD9632's exceptional settling time, bandwidth, and low distortion meet the requirements of many applications which previously depended on current feedback amplifiers. Its classical op amp structure works much more predictably in many designs. A proprietary design architecture has produced an amplifier that combines many of the best characteristics of both current feedback and voltage feedback amplifiers. The AD9631 and AD9632 exhibit exceptionally fast and accurate pulse response (16 ns to 0.01%) as well as extremely wide small signal and large signal bandwidth and ultralow distortion. The AD9631 achieves -72 dBc at 20 MHz and 320 MHz small signal and 175 MHz large signal bandwidths.
-70 2ND HARMONIC -90
3RD HARMONIC -110
-130 10k
100k
1M FREQUENCY - Hz
10M
100M
Figure 1. AD9631 Harmonic Distortion vs. Frequency, G = +1
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD9631/AD9632-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (V = 5 V; R
S LOAD
= 100 ; AV = 1 (AD9631); AV = 2 (AD9632), unless otherwise noted)
AD9631A Min Typ Max AD9632A Min Typ Max Units
Parameter DYNAMIC PERFORMANCE Bandwidth (-3 dB) Small Signal Large Signal1 Bandwidth for 0.1 dB Flatness Slew Rate, Average +/- Rise/Fall Time Settling Time To 0.1% To 0.01% HARMONIC/NOISE PERFORMANCE 2nd Harmonic Distortion 3rd Harmonic Distortion 3rd Order Intercept Noise Figure Input Voltage Noise Input Current Noise Average Equivalent Integrated Input Noise Voltage Differential Gain Error (3.58 MHz) Differential Phase Error (3.58 MHz) Phase Nonlinearity DC PERFORMANCE2, RL = 150 Input Offset Voltage3
Conditions
220 VOUT 0.4 V p-p VOUT = 4 V p-p 150 VOUT = 300 mV p-p 9631, RF = 140 ; 9632, RF = 425 1000 VOUT = 4 V Step VOUT = 0.5 V Step VOUT = 4 V Step VOUT = 2 V Step VOUT = 2 V Step 2 V p-p; 20 MHz, RL = 100 RL = 500 2 V p-p; 20 MHz, RL = 100 RL = 500 25 MHz RS = 50 1 MHz to 200 MHz 1 MHz to 200 MHz 0.1 MHz to 200 MHz RL = 150 RL = 150 dc to 100 MHz
320 175 130 1300 1.2 2.5 11 16 -64 -72 -76 -81 +46 18 7.0 2.5 100 0.03 0.02 1.1 3 -57 -65 -69 -74
180 155
250 180
MHz MHz MHz V/s ns ns ns ns -47 -65 -67 -74 dBc dBc dBc dBc dBm dB nVHz pAHz V rms % Degree Degree mV mV V/C A A A A dB dB dB k pF V V mA mA V mA mA dB
130 1200 1500 1.4 2.1 11 16 -54 -72 -74 -81 +41 14 4.3 2.0
0.06 0.04
60 0.02 0.04 0.02 0.04 1.1 2 5 8
TMIN -TMAX Offset Voltage Drift Input Bias Current TMIN -TMAX Input Offset Current Common-Mode Rejection Ratio Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range OUTPUT CHARACTERISTICS Output Voltage Range, RL = 150 Output Current Output Resistance Short Circuit Current POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio TMIN -TMAX TMIN -TMAX TMIN -TMAX VCM = 2.5 V VOUT = 2.5 V TMIN -TMAX 70 46 40
10 2 0.1 90 52
10 13 7 10 3 5 70 46 40
10 2 7 10 0.1 3 5 90 52
500 1.2 3.4 3.2 3.9 70 0.3 240 3.0 5.0 6.0 17 18 21 50 60
500 1.2 3.4 3.2 3.9 70 0.3 240 3.0 5.0 6.0 16 17 20 56 66
NOTES 1 See Max Ratings and Theory of Operation sections of data sheet. 2 Measured at AV = 50. 3 Measured with respect to the inverting input. Specifications subject to change without notice.
-2-
REV. A
AD9631/AD9632
ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V Voltage Swing x Bandwidth Product . . . . . . . . . . 550 V x MHz Internal Power Dissipation2 Plastic Package (N) . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 0.9 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 1.2 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . . -65C to +125C Operating Temperature Range (A Grade) . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C
NOTES Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Pin Plastic Package: JA = 90C/Watt 8-Pin SOIC Package: JA = 140C/Watt
1
The maximum power that can be safely dissipated by these devices is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately +150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of +175C for an extended period can result in device failure. While the AD9631 and AD9632 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves.
2.0
MAXIMUM POWER DISSIPATION - Watts
8-PIN MINI-DIP PACKAGE
TJ = +150C
1.5
METALIZATION PHOTO
Dimensions shown in inches and (mm). Connect Substrate to -V S.
-IN 2 +VS 7
1.0
8-PIN SOIC PACKAGE 0.5
0.046 (1.17)
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C
6 OUT
70
80 90
Figure 2. Plot of Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
3 +IN
4 -VS 0.050 (1.27)
AD9631
-IN 2
+VS 7
Model AD9631AN AD9631AR AD9631(SMD) AD9631-EB
Temperature Range
Package Package Description Option* N-8 R-8 Q-8
0.046 (1.17)
6 OUT
AD9632AN AD9632AR AD9632-EB
-40C to +85C Plastic DIP -40C to +85C SOIC -55C to +125C Cerdip Evaluation Board -40C to +85C Plastic DIP -40C to +85C SOIC Evaluation Board
N-8 R-8
*N = Plastic DIP; Q = Cerdip; R= SOIC (Small Outline Integrated Circuit).
3 +IN 4 -VS 0.050 (1.27)
AD9632
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although these devices feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-3-
AD9631/AD9632 AD9631-Typical Characteristics
RF +V S 10F 0.1F PULSE GENERATOR TR/TF = 350ps VIN RT 49.9 -VS 130 2 7 VIN PULSE GENERATOR TR/TF = 350ps 130 2 RT 49.9 3 RL = 100 10F 100 6 0.1F 4 VOUT 7 +V S RF 10F 0.1F
AD9631
3
AD9631
4
6 0.1F
VOUT RL = 100
10F -VS
Figure 3. Noninverting Configuration, G = +1
Figure 6. Inverting Configuration, G = -1
Figure 4. Large Signal Transient Response; VO = 4 V p-p, G = +1, RF = 250
Figure 7. Large Signal Transient Response; VO = 4 V p-p, G = -1, RF = RIN = 267
Figure 5. Small Signal Transient Response; VO = 400 mV p-p, G = +1, RF = 140
Figure 8. Small Signal Transient Response; VO = 400 mV p-p, G = -1, RF = RIN = 267
REV. A
-4-
AD9631/AD9632 AD9632-Typical Characteristics
RF PULSE GENERATOR TR/T F = 350ps RIN 2 130 RT 49.9 -VS 7 +V S 10F 0.1F
RF +V S 10F 0.1F 2 RT 49.9 100 7
PULSE GENERATOR T R/TF = 350ps VIN 130
AD9632
VIN 3 4
6 0.1F
VOUT RL = 100
AD9632
3 4
6 0.1F
VOUT RL = 100
10F
10F -VS
Figure 9. Noninverting Configuration, G = +2
Figure 12. Inverting Configuration, G= -1
Figure 10. Large Signal Transient Response; VO = 4 V p-p, G = +2, RF = RIN = 422
Figure 13. Large Signal Transient Response; VO = 4 V p-p, G = -1, RF = RIN = 422 , RT = 56.2
Figure 11. Small Signal Transient Response; VO = 400 mV p-p, G = +2, RF = RIN = 274
Figure 14. Small Signal Transient Response; VO = 400 mV p-p, G = -1, RF = RIN = 267 , RT = 61.9
REV. A
-5-
AD9631/AD9632 AD9631-Typical Characteristics
1 0 -1 -2
GAIN - dB
RF 200 VS = 5V RL = 100 VO = 300mV p-p RF 50
RF 450 VS = 5V RL = 100 GAIN = +1 400
-3dB BANDWIDTH - MHz
RF 150 RF 100
130
AD9631 RL
-3 -4 -5 -6 -7 -8 -9 1M
N PACKAGE 350
300 R PACKAGE
250
10M
100M
1G
20
40
60
80
100
120
140
160 180
200
220
240
FREQUENCY - Hz
VALUE OF FEEDBACK RESISTOR (RF) -
Figure 15. AD9631 Small Signal Frequency Response G = +1
Figure 18. AD9631 Small Signal -3 dB Bandwidth vs. RF
0.1 0 -0.1 -0.2
GAIN - dB
1 0 RF 250
-0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 1M
RF 120
OUTPUT - dB
VS = 5V RL = 100 G = +1 Vo = 300mV p-p
RF 100
RF 150 RF 140
-1 -2 -3 -4 -5 -6 -7 -8 -9 1M VS = 5V VO = 4V p-p RL = 100 RF = 50 TO 250 BY 50
10M FREQUENCY - Hz
100M
500M
10M FREQUENCY - Hz
100M
500M
Figure 16. AD9631 0.1 dB Flatness, N Package (for R Package Add 20 to RF)
Figure 19. AD9631 Large Signal Frequency Response, G = +1
90 80 70 PHASE 60 50 GAIN - dB 40 30 20 10 0 -10 -20 10k 100k 1M 10M 100M GAIN
100 80 60 PHASE MARGIN - Degrees 40 20 0 -20 -40 -60 -80 -100 -120 1G
1 0 -1 -2
GAIN - dB
-3 -4 -5 -6 -7 -8 -9 1M
VS = 5V RL = 100 VO = 300mV p-p
RF 267
FREQUENCY - Hz
10M 100M FREQUENCY - Hz
1G
Figure 17. AD9631 Open-Loop Gain and Phase Margin vs. Frequency, RL = 100
Figure 20. AD9631 Small Signal Frequency Response, G = -1
REV. A
-6-
AD9631/AD9632
-30
DIFF GAIN - %
0.10
HARMONIC DISTORTION - dBc
-50
VO = 2V p-p VS = 5V RL = 500 G = +1
0.05 0.00 -0.05 -0.10 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
-70 2ND HARMONIC -90
DIFF PHASE - Degrees
0.10 0.05 0.00 -0.05 -0.10 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
3RD HARMONIC -110
-130 10k
100k
1M FREQUENCY - Hz
10M
100M
Figure 21. AD9631 Harmonic Distortion vs. Frequency, RL = 500
Figure 24. AD9631 Differential Gain and Phase Error, G = +2, RL = 150
-30 VO = 2V p-p VS = 5V RL = 100 G = +1
0.3
HARMONIC DISTORTION - dBc
-50
0.2
0.1
2ND HARMONIC
ERROR - %
-70
0
-90 3RD HARMONIC -110
-0.1
-0.2
-130 10k
100k
1M FREQUENCY - Hz
10M
100M
-0.3
0
10
20
30 40 50 SETTLING TIME - ns
60
70
80
Figure 22. AD9631 Harmonic Distortion vs. Frequency, RL = 100
Figure 25. AD9631 Short-Term Settling Time, 2 V Step, RL = 100
60 55
0.3
0.2
50
INTERCEPT - +dBm
ERROR - %
20 40 FREQUENCY - MHz 60 80 100
45 40 35 30
0.1
0
-0.1
25 20 10
-0.2 0 1 2 3 4 5 6 7 SETTLING TIME - s 8 9 10
Figure 23. AD9631 Third Order Intercept vs. Frequency
Figure 26. AD9631 Long-Term Settling Time, 2 V Step, RL = 100
REV. A
-7-
AD9631/AD9632 AD9632-Typical Characteristics
7 6 5 4 VS = 5V RL = 100 VO = 300mV p-p RF 125 RF 225 RF 325 RF 425 350 VS = 5V RL = 100 GAIN = +2 49.9 RIN 100 RF AD9632 RL
-3dB BANDWIDTH - MHz
300
GAIN - dB
3 2 1 0 -1 -2 -3 1M
250
R PACKAGE
N PACKAGE
200
150 100 150 200 250 300 350 400 450 500 550
10M 100M FREQUENCY - Hz
1G
VALUE OF RF,RIN -
Figure 27. AD9632 Small Signal Frequency Response, G = +2
Figure 30. AD9632 Small Signal -3 dB Bandwidth vs. RF , RIN
0.1 0 -0.1 -0.2
OUTPUT - dB
RF 375 RF 275 RF 325 RF 425
7 6 5 4
OUTPUT - dB
RF 525
-0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 1M
VS = 5V RL = 100 G = +2 VO = 300mV p-p
3 2 1 0 -1 -2
VS = 5V VO = 4V p-p RL = 100
RF 125 TO 525 BY 100
10M FREQUENCY - Hz
100M
-3 1M
10M FREQUENCY - Hz
100M
500M
Figure 28. AD9632 0.1 dB Flatness, N Package (for R Package Add 20 to RF)
Figure 31. AD9632 Large Signal Frequency Response, G = +2
65 60 55 50 45 40 35 30 25 20 15 10 5 0 -5 -10 -15 10k AOL - dB PHASE 50 100
1 0 -1 -2
PHASE - Degrees
GAIN - dB
0 -50 -100 -150
-3 -4 -5 -6 -7
GAIN
VS = 5V RL = 100 VO = 300mV p-p
RF, RIN 267
-200 -250 100k 1M 10M FREQUENCY - Hz 100M 1G
-8 -9 1M
10M 100M FREQUENCY - Hz
1G
Figure 29. AD9632 Open-Loop Gain and Phase Margin vs. Frequency, RL = 100
Figure 32. AD9632 Small Signal Frequency Response, G = -1
REV. A
-8-
AD9631/AD9632
-30
DIFF GAIN - %
0.04
HARMONIC DISTORTION - dBc
-50
VO = 2V p-p VS = 5V RL = 500 G = +2 2ND HARMONIC
0.02 0.00 -0.02 -0.04 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
-70
DIFF PHASE - Degrees
-90
0.04 0.02 0.00 -0.02 -0.04 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
3RD HARMONIC -110
-130 10k
100k
1M FREQUENCY - Hz
10M
100M
Figure 33. AD9632 Harmonic Distortion vs. Frequency, RL = 500
Figure 36. AD9632 Differential Gain and Phase Error G = +2, RL = 150
-30 VO = 2V p-p VS = 5V RL = 100 G = +2
0.2
HARMONIC DISTORTION - dBc
-50
0.1
2ND HARMONIC
0
-90 3RD HARMONIC
ERROR - %
-70
-0.1
-110
-0.2
-130 10k
-0.3
100k
1M FREQUENCY - Hz
10M
100M
0
10
20
40 50 30 SETTLING TIME - ns
60
70
80
Figure 34. AD9632 Harmonic Distortion vs. Frequency, RL = 100
Figure 37. AD9632 Short-Term Settling Time 2 V Step, RL = 100
50 45
0.3
0.2
40
INTERCEPT - +dBm
ERROR - %
35 30 25 20
0.1
0
-0.1
15 10 10 FREQUENCY - MHz 100
-0.2
0
1
2
3
4 5 6 7 SETTLING TIME - s
8
9
10
Figure 35. AD9632 Third Order Intercept vs. Frequency
Figure 38. AD9632 Long-Term Settling Time 2 V Step, RL = 100
REV. A
-9-
AD9631/AD9632-Typical Characteristics
24 17
INPUT NOISE VOLTAGE - nV/Hz
VS = 5V 18 15 12 9 6 3 10 100 1k FREQUENCY - Hz 10k 100k
INPUT NOISE VOLTAGE - nV/Hz
21
15 VS = 5V 13 11 9 7 5 3 10 100 1k FREQUENCY - Hz 10k 100k
Figure 39. AD9631 Noise vs. Frequency
Figure 42. AD9632 Noise vs. Frequency
80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 10k -PSRR +PSRR
80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 10k +PSRR -PSRR
PSRR - dB
PSRR - dB
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY - Hz
FREQUENCY - Hz
Figure 40. AD9631 PSRR vs. Frequency
Figure 43. AD9632 PSRR vs. Frequency
100 90 80 70 60 50 40 30 20 100k VS = 5V VCM = 1V RL = 100
100 90 80 70 60 50 40 30 20 100k
VS = 5V VCM = 1V RL = 100
CMRR - dB
CMRR - dB
1M
10M FREQUENCY - Hz
100M
1G
1M
10M FREQUENCY - Hz
100M
1G
Figure 41. AD9631 CMRR vs. Frequency
Figure 44. AD9632 CMRR vs. Frequency
-10-
REV. A
AD9631/AD9632
1000 VS = 5V GAIN = +1 100
OPEN-LOOP GAIN - V/V
1350 1250 1150 1050 950 850 750 650 550 450 +AOL -AOL -AOL
AD9632
+AOL
ROUT -
10
1
0.1
AD9631
0.01 10k
100k
1M FREQUENCY - Hz
10M
100M
350 -60
-40
-20
0 20 40 60 80 100 JUNCTION TEMPERATURE - C
120
140
Figure 45. AD9631 Output Resistance vs. Frequency
Figure 48. Open-Loop Gain vs. Temperature
1000 VS = 5V GAIN = +2 100
76 74 72 70 -PSRR AD9632
ROUT -
10
PSRR - -dB
68 66
+PSRR AD9632 -PSRR AD9631
1
64 62
0.1
60 +PSRR 58 AD9631 -40 -20 0 20 40 60 80 100 120 140
0.01 10k
100k
1M FREQUENCY - Hz
10M
100M
56 -60
JUNCTION TEMPERATURE - C
Figure 46. AD9632 Output Resistance vs. Frequency
Figure 49. PSRR vs. Temperature
4.1 VS = 5V 4.0 |-VOUT| OUTPUT SWING - Volts 3.9 3.8 3.7 3.6 3.5 3.4 3.3 -60 +VOUT |-VOUT| +VOUT
}
RL = 150
-98
-96
CMRR - -dB
-94
-92
-90
}
RL = 50
-88 +CMRR
-CMRR
-40 -20
0
20
40
60
80
100
120
140
-86 -60
-40
-20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE - C
JUNCTION TEMPERATURE - C
Figure 47. AD9631/AD9632 Output Swing vs. Temperature
Figure 50. AD9631/AD9632 CMRR vs. Temperature
REV. A
-11-
AD9631/AD9632-Typical Characteristics
21 6V AD9631 240 250
AD9631
SHORT CIRCUIT CURRENT - mA
SINK 230 220 210 SOURCE
20 SUPPLY CURRENT - mA 19
AD9632 18 17 6V AD9631 5V 5V 16 15 14 -60 AD9632
AD9632
SINK
200 190 SOURCE 180 -60
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE - C
JUNCTION TEMPERATURE - C
Figure 51. Supply Current vs. Temperature
Figure 54. Short Circuit Current vs. Temperature
-1.0 -1.5 INPUT OFFSET VOLTAGE - mV -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 -60 VS = 5V
INPUT BIAS CURRENT - A
2.0
AD9631
1.5
-IB -IB +IB +IB
AD9632
1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -60
AD9632
AD9631
VS = 6V
VS = 5V VS = 6V -40 -20 0 20 40 60 80 100 120 140
-40
-20
JUNCTION TEMPERATURE - C
0 20 40 60 80 100 JUNCTION TEMPERATURE - C
120
140
Figure 52. Input Offset Voltage vs. Temperature
Figure 55. Input Bias Current vs. Temperature
220 200 180 160 140 3 WAFER LOTS COUNT = 1373 CUMULATIVE
100 90 80 70
180 160 140 120 3 WAFER LOTS COUNT = 573 CUMULATIVE
100 90 80 70 PERCENT 60
PERCENT
COUNT
120 100 80 60 40 20 0 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 INPUT OFFSET VOLTAGE - mV FREQ. DIST 50 40 30
COUNT
60
100 50 80 40 60 40 FREQ. DIST 30 20 10 0 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 INPUT OFFSET VOLTAGE - mV
20 10 0
20 0
Figure 53. AD9631 Input Offset Voltage Distribution
Figure 56. AD9632 Input Offset Voltage Distribution
-12-
REV. A
AD9631/AD9632
THEORY OF OPERATION General
+VS G= - RF RG 7 10F 0.1F 3 RIN 2 RG VIN RTERM 0.1F 10F -VS
The AD9631 and AD9632 are wide bandwidth, voltage feedback amplifiers. Since their open-loop frequency response follows the conventional 6 dB/octave roll-off, their gain bandwidth product is basically constant. Increasing their closed-loop gain results in a corresponding decrease in small signal bandwidth. This can be observed by noting the bandwidth specification between the AD9631 (gain of 1) and AD9632 (gain of 2). The AD9631/AD9632 typically maintain 65 degrees of phase margin. This high margin minimizes the effects of signal and noise peaking.
Feedback Resistor Choice
100-130
AD9631/32 6
4 RF
VOUT
The value of the feedback resistor is critical for optimum performance on the AD9631 (gain +1) and less critical as the gain increases. Therefore, this section is specifically targeted at the AD9631. At minimum stable gain (+1), the AD9631 provides optimum dynamic performance with RF = 140 . This resistor acts only as a parasitic suppressor against damped RF oscillations that can occur due to lead (input, feedback) inductance and parasitic capacitance. This value of RF provides the best combination of wide bandwidth, low parasitic peaking, and fast settling time. In fact, for the same reasons, a 100-130 resistor should be placed in series with the positive input for other AD9631 noninverting and all AD9631 inverting configurations. The correct connection is shown in Figures 57 and 58.
G=1+ RF RG +VS 10F 0.1F 100-130 VIN RTERM RIN 2 3 7
Figure 58. Inverting Operation
When the AD9631 is used in the transimpedance (I to V) mode, such as in photodiode detection, the value of RF and diode capacitance (CI) are usually known. Generally, the value of RF selected will be in the k range, and a shunt capacitor (CF) across RF will be required to maintain good amplifier stability. The value of CF required to maintain optimal flatness (<1 dB Peaking) and settling time can be estimated as:
CF (2 O CI RF - 1)/O RF
[
2
2
]
1/2
where O is equal to the unity gain bandwidth product of the amplifier in rad/sec, and CI is the equivalent total input capacitance at the inverting input. Typically O = 800 x 106 rad/sec (see Open-Loop Frequency Response curve (Figure 17). As an example, choosing RF = 10 k and CI = 5 pF, requires CF to be 1.1 pF (Note: CI includes both source and parasitic circuit capacitance). The bandwidth of the amplifier can be estimated using the CF calculated as:
AD9631/32 6
4 0.1F 10F RF
VOUT
f 3 dB
1.6 2R F CF
RF CF
RG
-VS
Figure 57. Noninverting Operation
II
CI
AD9631
VOUT
Figure 59. Transimpedance Configuration
REV. A
-13-
AD9631/AD9632
For general voltage gain applications, the amplifier bandwidth can be closely estimated as:
f 3 dB O RF 2 1+ RG
Power Supply Bypassing
This estimation loses accuracy for gains of +2/-1 or lower due to the amplifier's damping factor. For these "low gain" cases, the bandwidth will actually extend beyond the calculated value (see Closed-Loop BW plots, Figures 15 and 27). As a rule of thumb, capacitor CF will not be required if:
NG (RF RG ) x CI 4 O
Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier's response. In addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than 1 F) will be required to provide the best settling time and lowest distortion. A parallel combination of at least 4.7 F, and between 0.1 F and 0.01 F, is recommended. Some brands of electrolytic capacitors will require a small series damping resistor 4.7 for optimum results.
Driving Capacitive Loads
where NG is the Noise Gain (1 + RF/RG) of the circuit. For most voltage gain applications, this should be the case.
Pulse Response
Unlike a traditional voltage feedback amplifier, where the slew speed is dictated by its front end dc quiescent current and gain bandwidth product, the AD9631 and AD9632 provide "on demand" current that increases proportionally to the input "step" signal amplitude. This results in slew rates (1300 V/s) comparable to wideband current feedback designs. This, combined with relatively low input noise current (2.0 pA/Hz), gives the AD9631 and AD9632 the best attributes of both voltage and current feedback amplifiers.
Large Signal Performance
The AD9631 and AD9632 were designed primarily to drive nonreactive loads. If driving loads with a capacitive component is desired, the best frequency response is obtained by the addition of a small series resistance as shown in Figure 60. The accompanying graph shows the optimum value for RSERIES vs. capacitive load. It is worth noting that the frequency response of the circuit when driving large capacitive loads will be dominated by the passive roll-off of RSERIES and CL.
RF
RIN
RSERIES RIN
AD9631/32
RL 1k CL
The outstanding large signal operation of the AD9631 and AD9632 is due to a unique, proprietary design architecture. In order to maintain this level of performance, the maximum 550 V-MHz product must be observed, (e.g., @ 100 MHz, VO 5.5 V p-p).
Figure 60. Driving Capacitive Loads
40
30
R SERIES -
20 10 0 5 10 CL - pF 15 20 25
Figure 61. Recommended RSERIES vs. Capacitive Load
REV. A
-14-
AD9631/AD9632
APPLICATIONS
The AD9631 and AD9632 are voltage feedback amplifiers well suited for such applications as photodetectors, active filters, and log amplifiers. The devices' wide bandwidth (320 MHz), phase margin (65), low noise current (2.0 pA/Hz), and slew rate (1300 V/s) give higher performance capabilities to these applications over previous voltage feedback designs. With a settling time of 16 ns to 0.01% and 11 ns to 0.1%, the devices are an excellent choice for DAC I/V conversion. The same characteristics along with low harmonic distortion make them a good choice for ADC buffering/amplification. With superb linearity at relatively high signal frequencies, the AD9631 and AD9632 are ideal drivers for ADCs up to 12 bits.
Operation as a Video Line Driver
A multiple feedback active filter requires a voltage feedback amplifier and is more demanding of op amp performance than other active filter configurations such as the Sallen-Key. In general, the amplifier should have a bandwidth that is at least ten times the bandwidth of the filter if problems due to phase shift of the amplifier are to be avoided. Figure 63 is an example of a 20 MHz low pass multiple feedback active filter using an AD9632.
C1 50pF R3 78.7 2 C2 100pF 100 3 1 7 +5V 10F
R4 154 VIN R1 154
0.1F 6 VOUT
AD9632
5 4 0.1F
The AD9631 and AD9632 have been designed to offer outstanding performance as video line drivers. The important specifications of differential gain (0.02%) and differential phase (0.02) meet the most exacting HDTV demands for driving video loads.
274 274
-5V 10F
Figure 63. Active Filter Circuit
10F
+VS
Choose: FO = Cutoff Frequency = 20 MHz = Damping Ratio = 1/Q = 2
75 75 CABLE VOUT 75
0.1F 2 75 CABLE VIN 75 10F -VS 3 7
AD9631/ AD9632
4
H = Absolute Value of Circuit Gain = Then:
6 0.1F
-R4 R1 = 1
k = 2 FO C1 C2 = 4 C1(H +1) 2 R1 = 2 HK R3 = 2 K (H +1) R4 = H(R1)
Figure 62. Video Line Driver
Active Filters
The wide bandwidth and low distortion of the AD9631 and AD9632 are ideal for the realization of higher bandwidth active filters. These characteristics, while being more common in many current feedback op amps, are offered in the AD9631 and AD9632 in a voltage feedback configuration. Many active filter configurations are not realizable with current feedback amplifiers.
REV. A
-15-
AD9631/AD9632
A/D Converter Driver
As A/D converters move toward higher speeds with higher resolutions, there becomes a need for high performance drivers that will not degrade the analog signal to the converter. It is desirable from a system's standpoint that the A/D be the element in the signal chain that ultimately limits overall distortion. This places new demands on the amplifiers used to drive fast, high resolution A/Ds.
With high bandwidth, low distortion and fast settling time the AD9631 and AD9632 make high performance A/D drivers for advanced converters. Figure 64 is an example of an AD9631 used as an input driver for an AD872. A 12-bit, 10 Msps A/D converter.
+5V DIGITAL +5V ANALOG 10 DV DD 4 +5V ANALOG 0.1F 140 10F CLK 21 20 19 18 17 16 15 14 13 12 11 10 9 8 24 49.9 5 AGND DRGND DGND AV DD DRV DD 7 6 0.1F +5V DIGITAL
22 23 0.1F CLOCK INPUT
AD872
1 2 ANALOG IN 130 3 4 7 0.1F 6 1 VINA
OTR MSB BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 BIT10 BIT11 BIT12 AGND AV SS 25
AD9631
5 0.1F
2 VINB 27 REF GND
DIGITAL OUTPUT
-5V ANALOG 10F
0.1F 28 REF IN 26 1F REF OUT AV SS 3 0.1F
0.1F
-5V ANALOG
Figure 64. AD9631 Used as Driver for an AD872, a 12-Bit, 10 Msps A/D Converter
REV. A
-16-
AD9631/AD9632
Layout Considerations
The specified high speed performance of the AD9631 and AD9632 requires careful attention to board layout and component selection. Proper RF design techniques and low pass parasitic component selection are mandatory. The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance path. The ground plane should be removed from the area near the input pins to reduce stray capacitance. Chip capacitors should be used for the supply bypassing (see Figure 64). One end should be connected to the ground plane and the other within 1/8 inch of each power pin. An additional large (0.47 F-10 F) tantalum electrolytic capacitor should be connected in parallel, though not necessarily so close, to supply current for fast, large signal changes at the output. The feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. Capacitance variations of less than 1 pF at the inverting input will significantly affect high speed performance. Stripline design techniques should be used for long signal traces (greater than about 1 inch). These should be designed with a characteristic impedance of 50 or 75 and be properly terminated at each end.
Evaluation Board
RF +V S RO RT RS -VS OUT
RG IN
Inverting Configuration
RF +V S RO OUT
RG RS IN RT
-VS
Noninverting Configuration
+VS OPTIONAL C1 1000pF C2 1000pF -V S C3 0.1F C4 0.1F C5 10F C6 10F
An evaluation board for both the AD9631 and AD9632 is available that has been carefully laid out and tested to demonstrate that the specified high speed performance of the device can be realized. For ordering information, please refer to the Ordering Guide. The layout of the evaluation board can be used as shown or serve as a guide for a board layout.
Supply Bypassing Figure 65. Inverting and Noninverting Configurations for Evaluation Boards
Table I.
Component RF RG RO (Nominal) RS RT (Nominal) Small Signal BW (MHz)
-1 274 274 49.9 100 61.9 90
+1 140 49.9 130 49.9 320
AD9631A Gain +2 274 274 49.9 100 49.9 90
+10 2 k 221 49.9 100 49.9 10
+100 2 k 20.5 49.9 100 49.9 1.3
-1 274 274 100 100 61.9 250
+2 274 274 100 100 49.9 250
AD9632A Gain +10 2 k 221 49.9 100 49.9 20
+100 2 k 20.5 49.9 100 49.9 3
REV. A
-17-
AD9631/AD9632
DIP (N) INVERTER
DIP (N) NONINVERTER
SOIC (R) INVERTER
SOIC (R) NONINVERTER
Figure 66. Evaluation Board Silkscreen (Top)
DIP (N) INVERTER
DIP (N) NONINVERTER
SOIC (R) INVERTER
SOIC (R) NONINVERTER
Figure 67. Board Layout (Solder Side)
REV. A
-18-
AD9631/AD9632
DIP (N) INVERTER
DIP (N) NONINVERTER
SOIC (R) INVERTER
SOIC (R) NONINVERTER
Figure 68. Board Layout (Component Side)
REV. A
-19-
AD9631/AD9632
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Plastic DIP (N Package)
8 PIN 1 1 4 5 0.280 (7.11) 0.240 (6.10)
0.430 (10.92) 0.348 (8.84) 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.060 (1.52) 0.015 (0.38)
0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
0.130 (3.30) MIN SEATING PLANE
0.015 (0.381) 0.008 (0.204)
0.022 (0.558) 0.014 (0.356)
0.100 (2.54) BSC
0.070 (1.77) 0.045 (1.15)
8-Pin Plastic SOIC (R Package)
0.150 (3.81)
8 0.244 (6.20) 0.228 (5.79) PIN 1 1
5 0.157 (3.99) 0.150 (3.81) 4 0.020 (0.051) x 45 CHAMF 0.190 (4.82) 0.170 (4.32) 8 0 10 0 0.098 (0.2482) 0.075 (0.1905) 0.030 (0.76) 0.018 (0.46)
0.197 (5.01) 0.189 (4.80) 0.010 (0.25) 0.004 (0.10) 0.050 (1.27) BSC 0.102 (2.59) 0.094 (2.39)
0.090 (2.29)
0.019 (0.48) 0.014 (0.36)
8-Pin Cerdip (Q Package)
0.005 (0.13) MIN 0.055 (1.4) MAX
8 PIN 1 1 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18)
5 0.310 (7.87) 0.220 (5.59) 4 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38)
0.150 (3.81) MIN
0.015 (0.38) 0.008 (0.20) 15
0.023 (0.58) 0.014 (0.36)
0.100 0.070 (1.78) (2.54) 0.030 (0.76) BSC
0 SEATING PLANE
REV. A
-20-
PRINTED IN U.S.A.
C1936a-2.5-11/94

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